{
int ret;
- if (sds->id > 5)
- return -EINVAL;
if (!rtpcs_838x_sds_is_mode_supported(sds, mode))
return -EINVAL;
u8 sds_id = sds->id;
pr_info("%s %d\n", __func__, mode);
- if (sds_id < 0 || sds_id > 11) {
- pr_err("Wrong SerDes number: %d\n", sds_id);
- return;
- }
regmap_write_bits(sds->ctrl->map, rtpcs_930x_sds_regs[sds_id],
RTL930X_SDS_MASK << rtpcs_930x_sds_lsb[sds_id],
u8 sds_id = sds->id;
u32 v;
- if (sds_id < 0 || sds_id > 11) {
- pr_err("Wrong SerDes number: %d\n", sds_id);
- return 0;
- }
-
regmap_read(sds->ctrl->map, rtpcs_930x_sds_regs[sds_id], &v);
v >>= rtpcs_930x_sds_lsb[sds_id];
u32 mode;
u32 submode;
- if (sds->id < 0 || sds->id > 11) {
- pr_err("%s: invalid SerDes number: %d\n", __func__, sds->id);
- return;
- }
-
switch (phy_mode) {
case PHY_INTERFACE_MODE_SGMII:
case PHY_INTERFACE_MODE_1000BASEX:
{
int calib_tries = 0;
- if (sds->id < 0 || sds->id > 11)
- return -EINVAL;
-
/* Rely on setup from U-boot for some modes, e.g. USXGMII */
switch (phy_mode) {
case PHY_INTERFACE_MODE_1000BASEX:
u32 sds_id = sds->id;
int chiptype = 0;
- if (sds_id < 0 || sds_id > 13)
- return -EINVAL;
-
/*
* TODO: USXGMII is currently the swiss army knife to declare 10G
* multi port PHYs. Real devices use other modes instead. Especially
rtpcs_931x_sds_cmu_type_set(sds, mode, chiptype);
- if (sds_id >= 2 && sds_id <= 13) {
+ if (sds_id >= 2) {
if (chiptype)
rtpcs_sds_write(sds, 0x2E, 0x1, board_sds_tx_type1[sds_id - 2]);
else {
struct rtpcs_ctrl *ctrl = link->ctrl;
int ret = 0;
- if (link->sds->id < 0)
- return 0;
-
/*
* TODO: This (or copies of this) will be the central function for configuring the
* link between PHY and SerDes. As of now a lot of the code is scattered throughout